IEICE Trans

Kazuya MASU

A Sub-1mW Class-C-VCO-Based Low Voltage PLL with Ultra-Low-Power Digitally-Calibrated ILFD in 65nm CMOS Sho IKEDA Sang_yeop LEE Tatsuya KAMIMURA Hiroyuki ITO Noboru ISHIHARA Kazuya MASU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/06/01 Vol. E97-C No. 6 pp. 495-504 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: injection-locked frequency divider, phase-locked loop, Class-C VCO, CMOS, low supply voltage,
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Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis Shiho HAGIWARA Takanori DATE Kazuya MASU Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/04/01 Vol. E97-C No. 4 pp. 280-288 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology) Category: Keyword: design for manufacturing, Monte Carlo method, importance sampling, SRAM, process variation, yield, norm minimization, Gaussian mixture models, clustering, hypersphere sampling,
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State-Dependence of On-Chip Power Distribution Network Capacitance Koh YAMANAGA Shiho HAGIWARA Ryo TAKAHASHI Kazuya MASU Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/01/01 Vol. E97-C No. 1 pp. 77-84 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: CMOS logic circuit, state-dependent capacitance model, capacitance measurement, PDN-capacitance, parasitic capacitance,
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A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65 nm CMOS Sang_yeop LEE Norifumi KANEMARU Sho IKEDA Tatsuya KAMIMURA Satoru TANOI Hiroyuki ITO Noboru ISHIHARA Kazuya MASU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/10/01 Vol. E95-C No. 10 pp. 1589-1597 Type of Manuscript: Special Section PAPER (Special Section on Recent Progress in Microwave and Millimeter-Wave Technologies) Category: Keyword: injection locked frequency multiplier, ring VCO, pulse injection, CMOS,
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RF CMOS Integrated Circuit: History, Current Status and Future Prospects Noboru ISHIHARA Shuhei AMAKAWA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/02/01 Vol. E94-A No. 2 pp. 556-567 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: RF, CMOS, transceiver, integrated circuit, MEMS, future,
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Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence Shiho HAGIWARA Koh YAMANAGA Ryo TAKAHASHI Kazuya MASU Takashi SATO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 pp. 2409-2416 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: capacitance, power distribution network, state-dependency, integrated circuit modeling, electromagnetic interference,
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A Universal Equivalent Circuit Model for Ceramic Capacitors Koh YAMANAGA Shuhei AMAKAWA Kazuya MASU Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-C No. 3 pp. 347-354 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: ceramic capacitor, moment method, equivalent circuit, inductance,
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A Time-Slicing Ring Oscillator for Capturing Time-Dependent Delay Degradation and Power Supply Voltage Fluctuation Takumi UEZONO Kazuya MASU Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-C No. 3 pp. 324-331 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: voltage measurement, spatial voltage drop fluctuation, process variation, power/signal integrity,
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Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits Shiho HAGIWARA Takashi SATO Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 pp. 1031-1038 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: device parameter variation, MTCMOS, timing analysis, Monte-Carlo simulation,
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One-Shot Voltage-Measurement Circuit Utilizing Process Variation Takumi UEZONO Takashi SATO Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 pp. 1024-1030 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: voltage measurement, process variation, power/signal integrity,
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2-Port Modeling Technique for Surface-Mount Passive Components Using Partial Inductance Concept Koh YAMANAGA Takashi SATO Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 pp. 976-982 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: ceramic capacitor, inductance, impedance, power distribution network,
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Tunable CMOS LNA Using a Variable Inductor for a Reconfigurable RF Circuit Hirotaka SUGAWARA Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/02/01 Vol. E92-A No. 2 pp. 401-410 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: reconfigurable RF, variable inductor, LNA, MEMS,
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Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress Kenta YAMADA Takashi SATO Shuhei AMAKAWA Noriaki NAKAYAMA Kazuya MASU Shigetaka KUMASHIRO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/07/01 Vol. E91-C No. 7 pp. 1142-1150 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: STI, stress, modeling, SPICE, layout-aware,
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Application of Correlation-Based Regression Analysis for Improvement of Power Distribution Network Shiho HAGIWARA Takumi UEZONO Takashi SATO Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 pp. 951-956 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: voltage drop analysis, power distribution network, correlation coefficient, multiple regression,
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An Evaluation Method of the Number of Monte Carlo STA Trials for Statistical Path Delay Analysis Masanori IMAI Takashi SATO Noriaki NAKAYAMA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/04/01 Vol. E91-A No. 4 pp. 957-964 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: SSTA, STA, Monte Carlo STA, timing analysis, ranking,
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Reconfigurable RF CMOS Circuit for Cognitive Radio Kazuya MASU Kenichi OKADA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2008/01/01 Vol. E91-B No. 1 pp. 10-13 Type of Manuscript: INVITED PAPER (Special Section on Cognitive Radio and Spectrum Sharing Technology) Category: Keyword: CMOS, reconfigurable RF circuit, cognitive radio,
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Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology Hiroyuki ITO Hideyuki SUGITA Kenichi OKADA Tatsuya ITO Kazuhisa ITOI Masakazu SATO Ryozo YAMAUCHI Kazuya MASU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/03/01 Vol. E90-C No. 3 pp. 641-643 Type of Manuscript: LETTER Category: Microwaves, Millimeter-Waves Keyword: wafer-level chip scale package, RF CMOS, passive device,
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Statistical Modeling of a Via Distribution for Yield Estimation Takumi UEZONO Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/12/01 Vol. E89-A No. 12 pp. 3579-3584 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Interconnect Keyword: via distribution, yield estimation, wire length distribution,
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RF Passive Components Using Metal Line on Si CMOS Kazuya MASU Kenichi OKADA Hiroyuki ITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/06/01 Vol. E89-C No. 6 pp. 681-691 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: Si CMOS, on-chip passive, interconnect, transmission line, inductor, variable inductor, reconfigurable RF circuit,
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Wire Length Distribution Model for System LSI Takanori KYOGOKU Junpei INOUE Hidenari NAKASHIMA Takumi UEZONO Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3445-3452 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Interconnect Keyword: wire length distribution, core utilization, SoC, layout-area allocation,
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Evaluation of X Architecture Using Interconnect Length Distribution Hidenari NAKASHIMA Naohiro TAKAGI Junpei INOUE Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3437-3444 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Interconnect Keyword: X architecture, interconnect length distribution, ILD, Rent's rule, all-directional interconnect,
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Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model Hidenari NAKASHIMA Junpei INOUE Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3358-3366 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Prediction and Analysis Keyword: interconnect, layout compaction, physical design, placement, core utilization,
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Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit Yoshiaki YOSHIHARA Hirotaka SUGAWARA Hiroyuki ITO Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/02/01 Vol. E88-A No. 2 pp. 507-512 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: VCO, oscillator, variable inductor, reconfigurable RF circuit,
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High Density Differential Transmission Line Structure on Si ULSI Hiroyuki ITO Kenichi OKADA Kazuya MASU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/06/01 Vol. E87-C No. 6 pp. 942-948 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: differential transmission line, Si ULSI, crosstalk, bus line, interconnect density,
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Low Power Current-Cut Switched-Current Matched Filter for CDMA Kenji TOGURA Hiroyuki NAKASE Koji KUBOTA Kazuya MASU Kazuo TSUBOUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/02/01 Vol. E84-C No. 2 pp. 212-219 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Performance VLSI Processors and Technologies) Category: Keyword: switched-current (SI) circuit, matched filter, code division multiple access (CDMA), current-cut,
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Full-Duplex Asynchronous Spread Spectrum Modem Using a SAW Convolver for 2.4-GHz Wireless LAN Hiroyuki NAKASE Akihiko NAMBA Kazuya MASU Kazuo TSUBOUCHI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1994/07/25 Vol. E77-B No. 7 pp. 868-875 Type of Manuscript: Special Section PAPER (Special Issue on Personal, Indoor and Mobile Radio Communications) Category: Keyword: spread spectrum, SAW convolver, asynchronous SS modem, full-duplex, self jamming, 2.4-GHz wireless LAN,
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Three-Dimensional Simulation of Low-Temperature Operation MOSFET's You-Wen YI Kazuya MASU Kazuo TSUBOUCHI Nobuo MIKOSHIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/06/25 Vol. E74-C No. 6 pp. 1641-1647 Type of Manuscript: Special Section PAPER (Special Issue on Device and Process Simulation for Ultra Large Scale Integration) Category: Keyword:
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