Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-ANo. 7pp. 1410-1414 Type of Manuscript: Special Section LETTER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: multiplexer network, partitioning, field-data extractor,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-ANo. 7pp. 1294-1310 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: interconnection delay, clock skew, high-level synthesis (HLS), FPGA, floorplan,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/07/01 Vol. E98-ANo. 7pp. 1392-1405 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: high-level synthesis (HLS), FPGA, floorplan, interconnection delay, MUX,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/01/01 Vol. E96-ANo. 1pp. 312-321 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: high-level synthesis, RDR, thermal-aware, hot spots, interconnect delays,