IEICE Trans

Kazunari INOUE

High-Speed Design of Conflictless Name Lookup and Efficient Selective Cache on CCN Router Atsushi OOKA Shingo ATA Kazunari INOUE Masayuki MURATA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2015/04/01 Vol. E98-B No. 4 pp. 607-620 Type of Manuscript: PAPER Category: Network Keyword: future networks, content-centric networking, architecture, router hardware, content-addressable memory, bloom filter,
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A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application Hisashi IWAMOTO Yuji YANO Yasuto KURODA Koji YAMAMOTO Kazunari INOUE Ikuo OKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/08/01 Vol. E96-C No. 8 pp. 1076-1082 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: router, address lookup, power consumption, search engine, TCAM, low power,
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Deterministic Packet Buffer System with Multi FIFO Queues for the Advanced QoS Hisashi IWAMOTO Yuji YANO Yasuto KURODA Koji YAMAMOTO Shingo ATA Kazunari INOUE
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2013/07/01 Vol. E96-B No. 7 pp. 1819-1825 Type of Manuscript: PAPER Category: Network System Keyword: packet buffer, multi FIFO queues, memory controller, quality services,
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FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine Kazuya ZAITSU Koji YAMAMOTO Yasuto KURODA Kazunari INOUE Shingo ATA Ikuo OKA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2012/07/01 Vol. E95-B No. 7 pp. 2306-2314 Type of Manuscript: PAPER Category: Network System Keyword: IP router, address lookup, ternary content addressable memory (TCAM), power consumption, field programmable gate array (FPGA), circuit design,
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A New TCAM Architecture for Managing ACL in Routers Haesung HWANG Shingo ATA Koji YAMAMOTO Kazunari INOUE Masayuki MURATA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/11/01 Vol. E93-B No. 11 pp. 3004-3012 Type of Manuscript: PAPER Category: Network Keyword: Access Control List (ACL), hardware cost, IP router, prefix expansion, Ternary Content Addressable Memory (TCAM),
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A CAM-Based Signature-Matching Co-processor with Application-Driven Power-Reduction Features Kazunari INOUE Hideyuki NODA Kazutami ARIMOTO Hans Jurgen MATTAUSCH Tetsushi KOIDE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1332-1342 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: CAM, TCAM, signature-matching, network security,
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Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh Hideyuki NODA Kazunari INOUE Hans Jurgen MATTAUSCH Tetsushi KOIDE Katsumi DOSAKA Kazutami ARIMOTO Kazuyasu FUJISHIMA Kenji ANAMI Tsutomu YOSHIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-C No. 4 pp. 622-629 Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Memory Keyword: CMOS, Ternary CAM, network, refresh,
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A 0.18 µm 32 Mb Embedded DRAM Macro for 3-D Graphics Controller Akira YAMAZAKI Takeshi FUJINO Kazunari INOUE Isamu HAYASHI Hideyuki NODA Naoya WATANABE Fukashi MORISHITA Katsumi DOSAKA Yoshikazu MOROOKA Shinya SOEDA Kazutami ARIMOTO Setsuo WAKE Kazuyasu FUJISHIMA Hideyuki OZAKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/09/01 Vol. E85-C No. 9 pp. 1697-1708 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: embedded DRAM, system on chip, 3-D graphics concurrent operation,
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A Programmable Geometry Processor with Enhanced Four-Parallel SIMD Type Processing Core for PC-Based 3D Graphics Hiroyuki KAWAI Yoshitsugu INOUE Junko KOBARA Robert STREITENBERGER Hiroaki SUZUKI Hiroyasu NEGISHI Masatoshi KAMEYAMA Kazunari INOUE Yasutaka HORIBA Kazuyasu FUJISHIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/05/01 Vol. E85-C No. 5 pp. 1200-1210 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: 3D graphics, programmable, geometry, SIMD, clip test,
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A Low-Voltage 42.4 G-BPS Single-Ended Read-Modify-Write Bus and Programmable Page-Size on a 3D Frame-Buffer Kazunari INOUE Hideaki ABE Kaori MORI Shuji FUKAGAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/02/25 Vol. E83-C No. 2 pp. 195-204 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies) Category: Keyword: frame-buffer, embedded-DRAM, 3D, high bandwidth,
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