Katsuhisa SHINMEI


The Analysis of the Stacked-Surrounding Gate Transistor (S-SGT) DRAM for the High Speed and Low Voltage Operation
Tetsuo ENDOH Katsuhisa SHINMEI Hiroshi SAKURABA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9  pp. 1491-1498
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
SGTS-SGTDRAMbit-line capacitance
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