Kai-Yu LO


A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques
Chia-Wen CHANG Kai-Yu LO Hossameldin A. IBRAHIM Ming-Chiuan SU Yuan-Hua CHU Shyh-Jye JOU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4  pp. 481-490
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
all-digital phase-locked loopdigitally controlled oscillatorlow voltagespur suppressionlow jitterlow spur
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A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design
Li-Rong WANG Kai-Yu LO Shyh-Jye JOU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/10/01
Vol. E96-C  No. 10  pp. 1351-1355
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
double-edge-triggeredflip-floplevel-convertingsense amplifiermixed threshold voltage
 Summary | Full Text:PDF