Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1996/04/25 Vol. E79-DNo. 4pp. 385-387 Type of Manuscript: LETTER Category: Computer Hardware and Design Keyword: computer architecture, cache, penalty cycles, pipeline,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1991/10/25 Vol. E74-ANo. 10pp. 3078-3082 Type of Manuscript: Special Section PAPER (Special Issue on JTC-CSCC '90) Category: VLSI Design Technology Keyword: