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A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder Jiayi ZHU Dajiang ZHOU Satoshi GOTO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A
No. 12
pp. 2612-2622
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: DBF, SAO, HEVC, pipeline, | | Summary | Full Text:PDF | |
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A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications Dajiang ZHOU Jinjia ZHOU Jiayi ZHU Satoshi GOTO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A
No. 12
pp. 3203-3210
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: H.264/AVC, parallel, deblocking, ultra high resolution, QFHD, | | Summary | Full Text:PDF | |
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