James Chien-Mo LI

Power-Supply-Noise-Aware Timing Analysis and Test Pattern Regeneration
Cheng-Yu HAN Yu-Ching LI Hao-Tien KAN James Chien-Mo LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12  pp. 2320-2327
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
IR-drop, power-supply-noise, timing analysis, testing, 
 Summary | Full Text:PDF
Diagnosis of Timing Faults in Scan Chains Using Single Excitation Patterns
James Chien-Mo LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4  pp. 1024-1030
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
diagnosis, design for testability, delay fault testing, 
 Summary | Full Text:PDF
A Design for Testability Technique for Low Power Delay Fault Testing
James Chien-Mo LI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 621-628
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
testability technology (design for testability), delay fault testing, low power, ASIC, 
 Summary | Full Text:PDF