Itthichai ARUNGSRISANGCHAI

A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells
Itthichai ARUNGSRISANGCHAI Yuji SHIGEHIRO Isao SHIRAKAWA Hiromitsu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/12/25
Vol. E80-A  No. 12  pp. 2589-2599
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
VLSI, fabrication technology, mask pattern, LP, flow, 
 Summary | Full Text:PDF(870.3KB)
An Automatic Layout Generator for Bipolar Analog Modules
Takao ONOYE Akihisa YAMADA Itthichai ARUNGSRISANGCHAI Masakazu TANAKA Isao SHIRAKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A  No. 10  pp. 1306-1314
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
layout generator, analog curcuit, one-dimensianal array, block compaction, 
 Summary | Full Text:PDF(708.3KB)