IEICE Trans

Hyun Woo KIM

Novel Tunneling Field-Effect Transistor with Sigma-Shape Embedded SiGe Sources and Recessed Channel Min-Chul SUN Sang Wan KIM Garam KIM Hyun Woo KIM Hyungjin KIM Byung-Gook PARK
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/05/01 Vol. E96-C No. 5 pp. 639-643 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: TFET, compatibility to CMOS technology flow, sigma-shape embedded SiGe source, recessed channel,
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L-Shaped Tunneling Field-Effect Transistors for Complementary Logic Applications Sang Wan KIM Woo Young CHOI Min-Chul SUN Hyun Woo KIM Jong-Ho LEE Hyungcheol SHIN Byung-Gook PARK
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/05/01 Vol. E96-C No. 5 pp. 634-638 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: L-shaped TFETs, subthreshold swing, steep slope, complementary logic function,
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Study on Threshold Voltage Control of Tunnel Field-Effect Transistors Using V_T-Control Doping Region Hyungjin KIM Min-Chul SUN Hyun Woo KIM Sang Wan KIM Garam KIM Byung-Gook PARK
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/05/01 Vol. E95-C No. 5 pp. 820-825 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: Tunnel Field-Effect Transistors, threshold voltage, V_T-control doping region,
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Comparative Study on Top- and Bottom-Source Vertical-Channel Tunnel Field-Effect Transistors Min-Chul SUN Hyun Woo KIM Sang Wan KIM Garam KIM Hyungjin KIM Byung-Gook PARK
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/05/01 Vol. E95-C No. 5 pp. 826-830 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: vertical-channel TFET, field-coupling effect, source configuration,
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Enhancement of the Programming Speed in SANOS Nonvolatile Memory Device Designed Utilizing Al₂O₃ and SiO₂ Stacked Tunneling Layers Hyun Woo KIM Dong Hun KIM Joo Hyung YOU Tae Whan KIM
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/05/01 Vol. E93-C No. 5 pp. 651-653 Type of Manuscript: BRIEF PAPER Category: Memory Devices Keyword: SANOS, SONOS, charge transport, silicon nitride, stacked tunneling layer,
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