Hyeongseok YU


A Fast Sorting VLSI Architecture for General-Purpose Standard Median Filters
Hyeongseok YU Jun-Dong CHO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/03/01
Vol. E87-A  No. 3  pp. 698-700
Type of Manuscript:  Special Section LETTER (Special Section on Applications and Implementations of Digital Signal Processing)
Category: Image Processing
Keyword: 
VLSIsortingmedian filter
 Summary | Full Text:PDF(481.6KB)

A Folded VLSI Architecture of Decision Feedback Equalizer for QAM Modem
Hyeongseok YU Byung Wook KIM Jun-Dong CHO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/03/01
Vol. E87-A  No. 3  pp. 628-639
Type of Manuscript:  Special Section PAPER (Special Section on Applications and Implementations of Digital Signal Processing)
Category: Communication Theory and Systems
Keyword: 
decision feedback equalizerQAMVLSIFIR filterfolding
 Summary | Full Text:PDF(3.2MB)