Hsin-Wen TING

A Low-Cost Stimulus Design for Linearity Test in SAR ADCs
An-Sheng CHAO Cheng-Wu LIN Hsin-Wen TING Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/06/01
Vol. E97-C  No. 6  pp. 538-545
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
analog-to-digital converter (ADC)design for testability (DFT)pattern generator (PG)output response analyzer (ORA)
 Summary | Full Text:PDF(2.1MB)

A Third-Order Low-Distortion Delta-Sigma Modulator with Opamp Sharing and Relaxed Feedback Path Timing
I-Jen CHAO Chung-Lun HSU Bin-Da LIU Soon-Jyu CHANG Chun-Yueh HUANG Hsin-Wen TING 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/11/01
Vol. E95-C  No. 11  pp. 1799-1809
Type of Manuscript:  PAPER
Category: Electronic Circuits
delta-sigma modulatorDSMopamp sharingrelaxed dynamic element matching (DEM) timing
 Summary | Full Text:PDF(2.7MB)