Hsien-Ho CHUANG

Delay-Optimal Technology Mapping for Hard-Wired Non-Homogeneous FPGAs
Hsien-Ho CHUANG Jing-Yang JOU C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12  pp. 2545-2551
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Performance Optimization
Keyword: 
technology mapping, FPGA, hard-wired, non-homogeneous, XC4000, 
 Summary | Full Text:PDF
Technology Mapping for FPGAs with Composite Logic Block Architectures
Hsien-Ho CHUANG C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/10/25
Vol. E79-D  No. 10  pp. 1396-1404
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Synthesis
Keyword: 
technology mapping, FPGA, subject graph, pattern graph, 
 Summary | Full Text:PDF