Hiroyuki USUI


Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters
Takashi MIYAMORI Hui XU Hiroyuki USUI Soichiro HOSODA Toru SANO Kazumasa YAMAMOTO Takeshi KODAKA Nobuhiro NONOGAKI Nau OZAKI Jun TANABE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 360-368
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
many-corenetwork-on-chipVLIWlow powerface detectionH.264super resolution
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