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FOREWORD Hiroto YASUURA Shoji KAWAHITO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2005/08/01
Vol. E88-C
No. 8
pp. 1704-1704
Type of Manuscript:
FOREWORD Category: Keyword:
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Power Analysis and Estimation for SOC Design: Techniques and Tools Yun CAO Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/02/01
Vol. E87-A
No. 2
pp. 410-416
Type of Manuscript:
REVIEW PAPER Category: VLSI Design Technology and CAD Keyword: low power, SOC, power analysis, power estimation, | | Summary | Full Text:PDF(248.6KB) | |
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Leakage Power Reduction for Battery-Operated Portable Systems Yun CAO Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A
No. 12
pp. 3200-3203
Type of Manuscript:
Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Power Optimization Keyword: bitwidth optimization, leakage power reduction, dynamic power reduction, | | Summary | Full Text:PDF(318.9KB) | |
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Towards the System LSI Design Technology Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/01/01
Vol. E84-A
No. 1
pp. 91-97
Type of Manuscript:
INVITED PAPER (Special Section on the 10th Anniversary of the IEICE Transactions of Fundamentals: "Last Decade and 21st Century") Category: Keyword: system LSI, system on a chip, embedded system, soft-core processor, | | Summary | Full Text:PDF(377.6KB) | |
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FOREWORD Hiroto YASUURA Mitsumasa KOYANAGI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A
No. 11
pp. 2317-2317
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Experimental Analysis of Power Estimation Models of CMOS VLSI Circuits Tohru ISHIHARA Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A
No. 3
pp. 480-486
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Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems) Category: Keyword: CMOS VLSI circuits, low power design, power estimation, | | Summary | Full Text:PDF(520.2KB) | |
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FOREWORD Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/10/25
Vol. E79-D
No. 10
pp. 1371-1372
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FOREWORD Category: Keyword:
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FOREWORD Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/03/25
Vol. E78-D
No. 3
pp. 197-198
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FOREWORD Category: Keyword:
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FOREWORD Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D
No. 9
pp. 989-990
Type of Manuscript:
FOREWORD Category: Keyword:
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Extraction of Behavioral Descriptions from Synchronous Sequential Circuits Masahiko OHMURA Hiroto YASUURA Keikichi TAMARU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A
No. 10
pp. 1239-1246
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: behavioral extraction, logic verification, | | Summary | Full Text:PDF(580KB) | |
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An Architecture for FFT Butterfly Computation with Merged Core Multiplication technique Farhad Fuad ISLAM Hiroto YASUURA Keikichi TAMARU | Publication: IEICE TRANSACTIONS (1976-1990)
Publication Date: 1990/11/25
Vol. E73-E
No. 11
pp. 1810-1812
Type of Manuscript:
Special Section LETTER (Special Issue on 1990 Autumn Natl. Conv. IEICE) Category: Signals, Circuits and Images Keyword:
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