Hiroshi UOZAKI


A New Critical Area Simulation Algorithm and Its Application for Failing Bit Analysis
Chizu MATSUMOTO Yuichi HAMAMURA Yoshiyuki TSUNODA Hiroshi UOZAKI Isao MIYAZAKI Shiro KAMOHARA Yoshiyuki KANEKO Kenji KANAMITSU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/03/01
Vol. E94-C  No. 3  pp. 353-360
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
defectsfailure analysisfail bit signaturecritical area analysisintegrated circuit layout
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