Hiroshi SAKURABA


Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function Engineering
Yasue YAMAMOTO Takeshi HIDAKA Hiroki NAKAMURA Hiroshi SAKURABA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/04/01
Vol. E89-C  No. 4  pp. 560-567
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
Surrounding Gate Transistor (SGT)scalingintrinsic channelgate work function engineering
 Summary | Full Text:PDF

An Analysis of Program and Erase Mechanisms for Floating Channel Type Surrounding Gate Transistor Flash Memory Cells
Masakazu HIOKI Hiroshi SAKURABA Tetsuo ENDOH Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/09/01
Vol. E87-C  No. 9  pp. 1628-1635
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
Flash memorySurrounding Gate Transistor (SGT)floating bodyprogram and erase operation
 Summary | Full Text:PDF

The Analysis of the Stacked-Surrounding Gate Transistor (S-SGT) DRAM for the High Speed and Low Voltage Operation
Tetsuo ENDOH Katsuhisa SHINMEI Hiroshi SAKURABA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9  pp. 1491-1498
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
SGTS-SGTDRAMbit-line capacitance
 Summary | Full Text:PDF