IEICE Trans

Hiroomi HIKAWA

A Subspace Newton-Type Method for Approximating Transversely Repelling Chaotic Saddles Hidetaka ITO Hiroomi HIKAWA Yutaka MAEDA
Publication: Publication Date: 2018/07/01 Vol. E101-A No. 7 pp. 1127-1131 Type of Manuscript: LETTER Category: Nonlinear Problems Keyword: chaotic saddles, unstable periodic orbits, bifurcation, Newton iteration, subspace method,
	Summary \| Full Text:PDF

SOM-Based Vector Recognition with Pre-Grouping Functionality Yuto KUROSAKI Masayoshi OHTA Hidetaka ITO Hiroomi HIKAWA
Publication: Publication Date: 2018/06/01 Vol. E101-D No. 6 pp. 1657-1665 Type of Manuscript: PAPER Category: Biocybernetics, Neurocomputing Keyword: SOM, vector recognition, position identification, parallel classifiers,
	Summary \| Full Text:PDF

Off-Chip Training with Additive Perturbation for FPGA-Based Hand Sign Recognition System Hiroomi HIKAWA Masayuki TAMAKI Hidetaka ITO
Publication: Publication Date: 2018/02/01 Vol. E101-A No. 2 pp. 499-506 Type of Manuscript: PAPER Category: Neural Networks and Bioengineering Keyword: hand sign recognition, self-organizing map, hardware, off-chip learning, perturbation,
	Summary \| Full Text:PDF

Scalable Hardware Winner-Take-All Neural Network with DPLL Masaki AZUMA Hiroomi HIKAWA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2015/10/01 Vol. E98-D No. 10 pp. 1838-1846 Type of Manuscript: PAPER Category: Biocybernetics, Neurocomputing Keyword: neural network, winner-take-all, supervised learning, digital phase-locked loop, hardware architecture,
	Summary \| Full Text:PDF

Low-Power Wiring Method for Band-Limited Signals in CMOS Logic Circuits by Segmentation Coding with Pseudo-Majority Voting Katsuhiko UEDA Zuiko RIKUHASHI Kentaro HAYASHI Hiroomi HIKAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/04/01 Vol. E98-C No. 4 pp. 356-363 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: CMOS logic circuit, low power consumption, dynamic power consumption, majority voting, bus-invert coding,
	Summary \| Full Text:PDF

ROM-Less Phase to Amplitude Converter Using Sine Wave Approximation Based on Harmonic Removal from Trapezoid Wave Hiroomi HIKAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/07/01 Vol. E94-A No. 7 pp. 1581-1584 Type of Manuscript: LETTER Category: Cryptography and Information Security Keyword: direct digital frequency synthesizer, phase to amplitude converter, sine approximation, FPGA,
	Summary \| Full Text:PDF

Statistical Mechanical Analysis of Simultaneous Perturbation Learning Seiji MIYOSHI Hiroomi HIKAWA Yutaka MAEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/07/01 Vol. E92-A No. 7 pp. 1743-1746 Type of Manuscript: LETTER Category: Neural Networks and Bioengineering Keyword: simultaneous perturbation, on-line learning, statistical mechanical method, generalization error,
	Summary \| Full Text:PDF

Multilayer Neural Network with Threshold Neurons Hiroomi HIKAWA Kazuo SATO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/06/25 Vol. E81-A No. 6 pp. 1105-1112 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from ITC-CSCC'97) Category: Neural Networks Keyword: multilayer neural network, back-propagation, FPGA hardware,
	Summary \| Full Text:PDF

Interfrence Cancellation with Interpolated FFT Hiroomi HIKAWA Vijay K. JAIN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/03/25 Vol. E79-A No. 3 pp. 395-401 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: FFT, digital filter, spectrum estimation, interference cancellation,
	Summary \| Full Text:PDF

A Digital Frequency Synthesizer with a Phase Accumulator Hiroomi HIKAWA Shinsaku MORI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/06/25 Vol. E72-E No. 6 pp. 719-726 Type of Manuscript: PAPER Category: Radio Communication Keyword:
	Summary \| Full Text:PDF

Performance Improvement of All Digital Phase-Locked Loop with Adaptive Multilevel-Quantized Phase Comparator Osamu NAKAJIMA Hiroomi HIKAWA Shinsaku MORI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/03/25 Vol. E72-E No. 3 pp. 194-201 Type of Manuscript: PAPER Category: Communication Systems and Transmission Equipment Keyword:
	Summary \| Full Text:PDF

A Digital Phase-Locked Loop with a Low Frequency Clock Hiroomi HIKAWA Shinsaku MORI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/02/25 Vol. E72-E No. 2 pp. 111-117 Type of Manuscript: PAPER Category: Communication Device and Circuit Keyword:
	Summary \| Full Text:PDF