IEICE Trans

Hironori YAMAUCHI

Blurred Image Restoration by Using Real-Coded Genetic Algorithm Hideto NISHIKADO Hiroyuki MURATA Motonori YAMAJI Hironori YAMAUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/09/01 Vol. E85-A No. 9 pp. 2118-2126 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: real-coded genetic algorithm (RcGA), blurred image, image restoration, discrete Fourier transform (DFT), rolling-ball transform,
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System Electronics Technologies for Video Processing and Applications Tomio KISHIMOTO Hironori YAMAUCHI Ryota KASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/02/25 Vol. E82-A No. 2 pp. 197-205 Type of Manuscript: INVITED PAPER (Special Section on VLSI for Digital Signal Processing) Category: Keyword: video processing, MPEG2, parallel processing, VLSI processor architecture,
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Real-Time Feed-Forward Control LSIs for a Direct Wafer Exposure Electron Beam System Hironori YAMAUCHI Tetsuo MOROSAWA Takashi WATANABE Atsushi IWATA Tsutomu HOSAKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/01/25 Vol. E76-C No. 1 pp. 124-135 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: asic, pipeline, adaptive, electron beam,
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A High-Speed Special Purpose Processor for Underground Object Detection Hiroshi MIYANAGA Hironori YAMAUCHI Yuji NAGASHIMA Tsutomu HOSAKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/25 Vol. E75-C No. 10 pp. 1250-1258 Type of Manuscript: Special Section PAPER (Special Issue on Microprocessors) Category: Application Specific Processors Keyword: FFT, VLSI, underground objects, pulse radar,
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Design of a 4000-tap Acoustic Echo Canceller Using the Residue Number System and the Mixed-Radix Number System Satoshi MIKI Hiroshi MIYANAGA Hironori YAMAUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/25 Vol. E75-C No. 10 pp. 1232-1240 Type of Manuscript: Special Section PAPER (Special Issue on Microprocessors) Category: Application Specific Processors Keyword: residue number system, mixed-radix number system, scaling, adaptive filter, echo canceller,
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Architecture of a Floating-Point Butterfly Execution Unit in a 400-MFLOPS Processor VLSI and Its Implementation Hironori YAMAUCHI Hiroshi MIYANAGA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/11/25 Vol. E74-C No. 11 pp. 3852-3860 Type of Manuscript: Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor) Category: Dedicated Processors Keyword:
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A 400 MFLOPS FFT Processor VLSI Architecture Hiroshi MIYANAGA Hironori YAMAUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/11/25 Vol. E74-C No. 11 pp. 3845-3851 Type of Manuscript: Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor) Category: Dedicated Processors Keyword:
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CMOS Radix-2 Signed-Digit Adder by Binary Code Representation Tadashi NAKANISHI Hironori YAMAUCHI Hiroshi YOSHIMURA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1986/04/25 Vol. E69-E No. 4 pp. 261-263 Type of Manuscript: Special Section LETTER (Special Issue: Papers from 1986 National Convention IECE Japan) Category: Silicon Devices and Integrated Circuits Keyword:
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