Hiromitsu TAKAHASHI

A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells
Itthichai ARUNGSRISANGCHAI Yuji SHIGEHIRO Isao SHIRAKAWA Hiromitsu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/12/25
Vol. E80-A  No. 12  pp. 2589-2599
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
VLSI, fabrication technology, mask pattern, LP, flow, 
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Cellular Neural Networks with Multiple-Valued Output and Its Application
Akihiro KANAGAWA Hiroaki KAWABATA Hiromitsu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/10/25
Vol. E79-A  No. 10  pp. 1658-1663
Type of Manuscript:  Special Section LETTER (Special Section on Nonlinear Theory and its Applications (NOLTA))
Category: 
Keyword: 
cellular neural network, associative memory, classification problem, 
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An Algorithm for the Solution of a Linear system by Δ-Y Transformations
Hiroyuki NAKAHARA Hiromitsu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/07/25
Vol. E79-A  No. 7  pp. 1079-1088
Type of Manuscript:  PAPER
Category: Graphs and Networks
Keyword: 
planar graph, Δ-Y transformation, embedding, minor, linear system, 
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Implicit Representation and Manipulation of Binary Decision Diagrams
Hitoshi YAMAUCHI Nagisa ISHIURA Hiromitsu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/03/25
Vol. E79-A  No. 3  pp. 354-362
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
binary decision diagram (BDD), representation of Boolean functions, logic design verification, logic synthesis, implicit representation of graphs, 
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