Hirokatsu SHIRAHAMA


Design of an Energy-Efficient Ternary Current-Mode Intra-Chip Communication Link for an Asynchronous Network-on-Chip
Akira MOCHIZUKI Hirokatsu SHIRAHAMA Yuma WATANABE Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9  pp. 2304-2311
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Communication for VLSI
Keyword: 
asynchronous communication linknetwork-on-chipmultiple-valued logiccurrent-mode
 Summary | Full Text:PDF

High-Throughput Partially Parallel Inter-Chip Link Architecture for Asynchronous Multi-Chip NoCs
Naoya ONIZAWA Akira MOCHIZUKI Hirokatsu SHIRAHAMA Masashi IMAI Tomohiro YONEDA Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/06/01
Vol. E97-D  No. 6  pp. 1546-1556
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
Asynchronous circuitsNetwork-on-Chip (NoC)burst-mode data transmissionlevel-encoded dual-rail (LEDR) encodingerror detectiondata retransmission
 Summary | Full Text:PDF

Energy-Aware Multiple-Valued Current-Mode Sequential Circuits Using a Completion-Detection Scheme
Hirokatsu SHIRAHAMA Takashi MATSUURA Masanori NATSUI Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8  pp. 2080-2088
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Multiple-Valued VLSI Technology
Keyword: 
multiple-valued logiccurrent-mode circuitadaptive current controlmany-core processor
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Design and Evaluation of a 5454-bit Multiplier Based on Differential-Pair Circuitry
Akira MOCHIZUKI Hirokatsu SHIRAHAMA Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 683-691
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
differential-pair circuitcurrent-mode circuitmultiple-valued logic
 Summary | Full Text:PDF

Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic
Akira MOCHIZUKI Hirokatsu SHIRAHAMA Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1591-1597
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
differential-pair circuitcurrent-mode circuitmultiple-valued logicdynamic logic
 Summary | Full Text:PDF