IEICE Trans

Hirofumi SHINOHARA

Energy-Efficient Post-Processing Technique Having High Extraction Efficiency for True Random Number Generators Ruilin ZHANG Xingyu WANG Hirofumi SHINOHARA
Publication: Publication Date: 2021/07/01 Vol. E104-C No. 7 pp. 300-308 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: post-processing techniques, von Neumann entropy extractor, true random number generator, low-power,
	Summary \| Full Text:PDF(3.2MB)

Accurate Nanopower Supply-Insensitive CMOS Unit V_th Extractor and αV_th Extractor with Continuous Variety Jing WANG Li DING Qiang LI Hirofumi SHINOHARA Yasuaki INOUE
Publication: Publication Date: 2017/05/01 Vol. E100-A No. 5 pp. 1145-1155 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: analog VLSI, CMOS, nanopower circuits, supply-insensitive, V_th extractor,
	Summary \| Full Text:PDF(1.7MB)

A 3.5ppm/°C 0.85V Bandgap Reference Circuit without Resistors Jing WANG Qiang LI Li DING Hirofumi SHINOHARA Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-A No. 7 pp. 1430-1437 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: analog, bandgap reference, sub-1-V, voltage reference, supply-insensitive,
	Summary \| Full Text:PDF(1.1MB)

Design of a Sensorless Controller Synthesized by Robust H∞ Control for Boost Converters Xutao LI Minjie CHEN Hirofumi SHINOHARA Tsutomu YOSHIHARA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2016/02/01 Vol. E99-B No. 2 pp. 356-363 Type of Manuscript: PAPER Category: Energy in Electronics Communications Keyword: boost converters, sensorless control, robust H∞ control, closed-loop characteristics,
	Summary \| Full Text:PDF(1.5MB)

Extremely Low Power Digital and Analog Circuits Hirofumi SHINOHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/06/01 Vol. E97-C No. 6 pp. 469-475 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: sub-threshold, near-threshold, energy efficiency, extremely low voltage, extremely low power,
	Summary \| Full Text:PDF(2.1MB)

Analytical Model of Static Noise Margin in CMOS SRAM for Variation Consideration Hirofumi SHINOHARA Koji NII Hidetoshi ONODERA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-C No. 9 pp. 1488-1500 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: SRAM, memory cell, static noise margin, SNM, variability,
	Summary \| Full Text:PDF(803.7KB)

A Large-Scale, Flip-Flop RAM Imitating a Logic LSI for Fast Development of Process Technology Masako FUJII Koji NII Hiroshi MAKINO Shigeki OHBAYASHI Motoshige IGARASHI Takeshi KAWAMURA Miho YOKOTA Nobuhiro TSUDA Tomoaki YOSHIZAWA Toshikazu TSUTSUI Naohiko TAKESHITA Naofumi MURATA Tomohiro TANAKA Takanari FUJIWARA Kyoko ASAHINA Masakazu OKADA Kazuo TOMITA Masahiko TAKEUCHI Shigehisa YAMAMOTO Hiromitsu SUGIMOTO Hirofumi SHINOHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/08/01 Vol. E91-C No. 8 pp. 1338-1347 Type of Manuscript: Special Section PAPER (Special Section on Microelectronic Test Structures (ICMTS2007)) Category: Keyword: large-scale integration, logic circuit fault diagnosis, SRAM, yield optimization,
	Summary \| Full Text:PDF(1.7MB)

A Design of High-Speed 4-2 Compressor for Fast Multiplier Hiroshi MAKINO Hiroaki SUZUKI Hiroyuki MORINAKA Yasunobu NAKASE Hirofumi SHINOHARA Koichiro MASHIKO Tadashi SUMI Yasutaka HORIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/04/25 Vol. E79-C No. 4 pp. 538-548 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed LSIs) Category: Keyword: 4-2 compressor, multiplier, redundant binary, transmission gate, CMOS circuit,
	Summary \| Full Text:PDF(1012.7KB)