Hiroe IWASAKI


Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture
Ken NAKAMURA Daisuke KOBAYASHI Yuya OMORI Tatsuya OSAWA Takayuki ONISHI Koyo NITTA Hiroe IWASAKI 
Publication:   
Publication Date: 2020/03/01
Vol. E103-C  No. 3  pp. 77-84
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
HEVCdecoderhigh frame ratetemporal scalability
 Summary | Full Text:PDF(2.8MB)

An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures
Koyo NITTA Hiroe IWASAKI Takayuki ONISHI Takashi SANO Atsushi SAGATA Yasuyuki NAKAJIMA Minoru INAMORI Ryuichi TANIDA Atsushi SHIMIZU Ken NAKAMURA Mitsuo IKEDA Jiro NAGANUMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 432-440
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
H.264/AVCencoderMPSoCME/MCand HDTV
 Summary | Full Text:PDF(4.1MB)

On-Chip Multimedia Real-Time OS and Its MPEG-2 Applications
Hiroe IWASAKI Jiro NAGANUMA Makoto ENDO Takeshi OGURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/04/01
Vol. E84-D  No. 4  pp. 448-455
Type of Manuscript:  PAPER
Category: VLSI Systems
Keyword: 
real-time OSembedded system LSI (system LSI)multimedia processingMPEG-2 systemsMPEG-2 video
 Summary | Full Text:PDF(860.6KB)