Hiroaki YOSHIDA


An Energy-Efficient Patchable Accelerator and Its Design Methods
Hiroaki YOSHIDA Masayuki WAKIZAKA Shigeru YAMASHITA Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2507-2517
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
engineering changehigh-level synthesisenergy efficiency
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Interconnect-Aware Pipeline Synthesis for Array-Based Architectures
Shanghua GAO Hiroaki YOSHIDA Kenshu SETO Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6  pp. 1464-1475
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
software pipelininginterconnect delayhigh level synthesisschedulingperformance
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A Structural Approach for Transistor Circuit Synthesis
Hiroaki YOSHIDA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3529-3537
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Synthesis
Keyword: 
transistor-level synthesisstatic CMOS circuitsalgebraic transformationsstructural transformationsdynamic programming
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A Performance Driven Module Generator for a Dual-Rail PLA with Embedded 2-Input Logic Cells
Ulkuhan EKINCIEL Hiroaki YAMAOKA Hiroaki YOSHIDA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/06/01
Vol. E88-D  No. 6  pp. 1159-1167
Type of Manuscript:  PAPER
Category: Computer Components
Keyword: 
PLAmodule generatorcell generationHDL behavior generation
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A Logic-Cell-Embedded PLA (LCPLA): An Area-Efficient Dual-Rail Array Logic Architecture
Hiroaki YAMAOKA Hiroaki YOSHIDA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/02/01
Vol. E87-C  No. 2  pp. 238-245
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
PLAlogic celldual-railarray logicarea-efficient
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