Hiroaki MATSUDA


A Balanced-Mesh Clock Routing Technique for Performance Improvement
Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8  pp. 1489-1495
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSICADlayout designclock skewpartitioningroutingMPEG2
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