Hideyuki TERANE


A 100-MHz 2-D Discrete Cosine Transform Core Processor
Shin-ichi URAMOTO Yoshitsugu INOUE Akihiko TAKABATAKE Jun TAKEDA Yukihiro YAMASHITA Hideyuki TERANE Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/04/25
Vol. E75-C  No. 4  pp. 390-397
Type of Manuscript:  Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium)
Category: 
Keyword: 
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