Hidenori SATO

Necessary and Sufficient Conditions for One-Dimensional Discrete-Time Binary Cellular Neural Networks with Unspecified Fixed Boundaries to Be Stable
Hidenori SATO Tetsuo NISHI Norikazu TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/09/01
Vol. E85-A  No. 9  pp. 2036-2043
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and Its Applications)
Category: 
Keyword: 
stability condition, one-dimensional discrete binary cellular neural networks, fixed boundary, 
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An Architectural Study of an MPEG-2 422P@HL Encoder Chip Set
Ayako HARADA Shin-ichi HATTORI Tadashi KASEZAWA Hidenori SATO Tetsuya MATSUMURA Satoshi KUMAKI Kazuya ISHIHARA Hiroshi SEGAWA Atsuo HANAMI Yoshinori MATSUURA Ken-ichi ASANO Toyohiko YOSHIDA Masahiko YOSHIMOTO Tokumichi MURAKAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/08/25
Vol. E83-A  No. 8  pp. 1614-1623
Type of Manuscript:  Special Section PAPER (Special Section on Digital Signal Processing)
Category: Implementations of Signal Processing Systems
Keyword: 
video compression, video encoder, MPEG-2, HDTV, motion estimation, 
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A Balanced-Mesh Clock Routing Technique for Performance Improvement
Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8  pp. 1489-1495
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSI, CAD, layout design, clock skew, partitioning, routing, MPEG2, 
 Summary | Full Text:PDF