Hideki TAKASE

An Integrated Framework for Energy Optimization of Embedded Real-Time Applications
Hideki TAKASE Gang ZENG Lovic GAUTHIER Hirotaka KAWASHIMA Noritoshi ATSUMI Tomohiro TATEMATSU Yoshitake KOBAYASHI Takenori KOSHIRO Tohru ISHIHARA Hiroyuki TOMIYAMA Hiroaki TAKADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2477-2487
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
energy optimization, compiler, profiler, real-time operating systems, embedded systems, 
 Summary | Full Text:PDF
Nested Loop Parallelization Using Polyhedral Optimization in High-Level Synthesis
Akihiro SUDA Hideki TAKASE Kazuyoshi TAKAGI Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2498-2506
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
high-level synthesis, array partitioning, buffer management, Polyhedral Optimization, 
 Summary | Full Text:PDF
Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems
Hideki TAKASE Hiroyuki TOMIYAMA Hiroaki TAKADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/10/01
Vol. E94-A  No. 10  pp. 1954-1964
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
scratch-pad memory, energy optimization, compiler, code allocation, multi-task systems, 
 Summary | Full Text:PDF