Hideaki YAMANAKA


ONU Power Saving Scheme for EPON System
Hiroaki MUKAI Fumihiko TANO Masaki TANAKA Seiji KOZAKI Hideaki YAMANAKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/05/01
Vol. E95-B  No. 5  pp. 1625-1632
Type of Manuscript:  PAPER
Category: Fiber-Optic Transmission for Communications
Keyword: 
FTTHPONpower savesleep
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FOREWORD
Masayuki TANIMOTO Kohichi SAKANIWA Kiyoharu AIZAWA Kazuyoshi OSHIMA Kiyomi KUMOZAKI Shuji TASAKA Yoichi MAEDA Takeshi MIZUIKE Mikio YAMASHITA Hideaki YAMANAKA Koichiro WAKASUGI Masaaki KATAYAMA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/12/25
Vol. E81-B  No. 12  pp. 2253-2256
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
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Shared Multibuffer ATM Switches with Hierarchical Queueing and Multicast Functions
Hideaki YAMANAKA Hirotaka SAITO Hirotoshi YAMADA Harufusa KONDOH Hiromi NOTANI Yoshio MATSUDA Kazuyoshi OSHIMA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/08/25
Vol. E79-B  No. 8  pp. 1109-1120
Type of Manuscript:  PAPER
Category: Switching and Communication Processing
Keyword: 
ATM switch architecturehierarchical queueingmulticast functionsATM access systemsATM loop systems
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An Efficient Self-Timed Queue Architecture for ATM Switch LSIs
Harufusa KONDOH Hideaki YAMANAKA Masahiko ISHIWAKI Yoshio MATSUDA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12  pp. 1865-1872
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
ATMATM switchLSIself-timed systems
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A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs
Harufusa KONDOH Hiromi NOTANI Hideaki YAMANAKA Keiichi HIGASHITANI Hirotaka SAITO Isamu HAYASHI Yoshio MATSUDA Kazuyoshi OSHIMA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7  pp. 1094-1101
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Improved Binary Digital Architectures
Keyword: 
B-ISDNATMswitchLSIBiCMOS
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