Haruhiko ICHINO


Physical Layer OAM&P Signaling Method for 10 Gbit/s Ethernet Transport over Optical Networks
Kazuhiko TERADA Kenji KAWAI Osamu ISHIDA Keiji KISHINE Noboru IWASAKI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2005/10/01
Vol. E88-B  No. 10  pp. 3952-3961
Type of Manuscript:  Special Section PAPER (Special Section on Next Generation Photonic Network Technologies)
Category: 
Keyword: 
10 Gbit/s EthernetILSOAMP
 Summary | Full Text:PDF

Techniques for Widening Lock and Pull-in Ranges and Suppressing Jitter in Clock and Data Recovery ICs--Duplicated Loop Control CDR--
Keiji KISHINE Noboru ISHIHARA Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/04/01
Vol. E84-C  No. 4  pp. 460-469
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock and data recoveryPLLduplicated looplow jitter2.5-Gb/s
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A Jitter Suppression Technique for a Clock Multiplier
Kiyoshi ISHII Keiji KISHINE Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/04/25
Vol. E83-C  No. 4  pp. 647-651
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock multiplierphase-locked loopSAW filterjitter generationjitter transfer function
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Low-Power 2.5-Gb/s Si-Bipolar IC Chipset for Optical Receivers and Transmitters Using Low-Voltage and Adjustment-Free Circuit Techniques
Masaki HIROSE Keiji KISHINE Haruhiko ICHINO Noboru ISHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/03/25
Vol. E82-C  No. 3  pp. 511-518
Type of Manuscript:  Special Section PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology)
Category: Silicon Devices
Keyword: 
optical receiveroptical transmitteradjustment freeSi bipolaroffsetPLL
 Summary | Full Text:PDF

Low-Power Circuit Design Techniques for Si Bipolar Gbit/s LSIsAn Overview
Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1511-1522
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarhigh speedlow poweroptical transmission
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A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarECLstandard cellCADSDH
 Summary | Full Text:PDF