Harufusa KONDOH


A 10 Gbase Ethernet Transceiver (LAN PHY) in a 1.8 V, 0.18 µm SOI/CMOS Technology
Tsutomu YOSHIMURA Kimio UEDA Jun TAKASOH Harufusa KONDOH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 643-651
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
10 Gb/s Ethernetclock and data recoverylock detectorSOI/CMOS process
 Summary | Full Text:PDF

Shared Multibuffer ATM Switches with Hierarchical Queueing and Multicast Functions
Hideaki YAMANAKA Hirotaka SAITO Hirotoshi YAMADA Harufusa KONDOH Hiromi NOTANI Yoshio MATSUDA Kazuyoshi OSHIMA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/08/25
Vol. E79-B  No. 8  pp. 1109-1120
Type of Manuscript:  PAPER
Category: Switching and Communication Processing
Keyword: 
ATM switch architecturehierarchical queueingmulticast functionsATM access systemsATM loop systems
 Summary | Full Text:PDF

A 1.5-V 250-MHz to 3.0-V 622-MHz Operation CMOS Phase-Locked Loop with Precharge Type Phase-Frequency Detector
Harufusa KONDOH Hiromi NOTANI Tsutomu YOSHIMURA Hiroshi SHIBATA Yoshio MATSUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/04/25
Vol. E78-C  No. 4  pp. 381-388
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits)
Category: Digital Circuits
Keyword: 
PLLPFDVCOCMOSATM
 Summary | Full Text:PDF

An Efficient Self-Timed Queue Architecture for ATM Switch LSIs
Harufusa KONDOH Hideaki YAMANAKA Masahiko ISHIWAKI Yoshio MATSUDA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12  pp. 1865-1872
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
ATMATM switchLSIself-timed systems
 Summary | Full Text:PDF

A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs
Harufusa KONDOH Hiromi NOTANI Hideaki YAMANAKA Keiichi HIGASHITANI Hirotaka SAITO Isamu HAYASHI Yoshio MATSUDA Kazuyoshi OSHIMA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7  pp. 1094-1101
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Improved Binary Digital Architectures
Keyword: 
B-ISDNATMswitchLSIBiCMOS
 Summary | Full Text:PDF

A Fully Integrated 6.25% Pull-in Range Digital PLL for ISDN Primary Rate Interface LSI
Harufusa KONDOH Seiji KOZAKI Shinya MAKINO Hiromi NOTANI Fuminobu HIDANI Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/03/25
Vol. E75-C  No. 3  pp. 280-287
Type of Manuscript:  Special Section PAPER (Special Issue on Analog LSI and Related Technology)
Category: 
Keyword: 
PLLpull-in rangeoscillatorISDNprimary rate interface
 Summary | Full Text:PDF