IEICE Trans

Hans Jurgen MATTAUSCH

Compact Modeling of Expansion Effects in LDMOS Takahiro IIZUKA Takashi SAKUDA Yasunori ORITSUKI Akihiro TANAKA Masataka MIYAKE Hideyuki KIKUCHIHARA Uwe FELDMANN Hans Jurgen MATTAUSCH Mitiko MIURA-MATTAUSCH
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/11/01 Vol. E95-C No. 11 pp. 1817-1823 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: high-voltage MOSFETs, breakdown, high-electric-field phenomena, compact model, surface potential,
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Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems Takeshi KUMAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Masaharu TAGAMI Masakatsu ISHIZAKI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2011/09/01 Vol. E94-D No. 9 pp. 1742-1754 Type of Manuscript: PAPER Category: Fundamentals of Information Systems Keyword: matrix-processing architecture, SIMD, bit-serial and word-parallel, CAM, table-lookup coding, cryptographic algorithm, AES,
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Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100 nm SOC Circuit Design Norio SADACHIKA Shu MIMURA Akihiro YUMISAKI Kou JOHGUCHI Akihiro KAYA Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/03/01 Vol. E94-C No. 3 pp. 361-367 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: circuit simulation, compact model, DFM, reliability,
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Degraded Frequency-Tuning Range and Oscillation Amplitude of LC-VCOs due to the Nonquasi-Static Effect in MOS Varactors Masataka MIYAKE Daisuke HORI Norio SADACHIKA Uwe FELDMANN Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Tatsuya OHGURO Takahiro IIZUKA Masahiko TAGUCHI Shunsuke MIYAMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/06/01 Vol. E92-C No. 6 pp. 777-784 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: accumulation-mode, MOS varactor, carrier-transit delay, nonquasi-static effect, compact model, surface potential, circuit simulation, LC-VCO, frequency-tuning range, FTR, oscillation amplitude,
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Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation Masataka MIYAKE Daisuke HORI Norio SADACHIKA Uwe FELDMANN Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Takahiro IIZUKA Kazuya MATSUZAWA Yasuyuki SAHARA Teruhiko HOSHIDA Toshiro TSUKADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/05/01 Vol. E92-C No. 5 pp. 608-615 Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices) Category: Keyword: carrier dynamics, low voltage, displacement current, continuity equation, carrier-transit delay, nonquasi-static effect, compact MOSFET model, driving capability, drift, diffusion, surface potential, circuit simulation,
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Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor Takeshi KUMAKI Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Yasuto KURODA Takayuki GYOHTEN Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-C No. 9 pp. 1409-1418 Type of Manuscript: Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation) Category: Keyword: content addressable memory, CAM, matrix-processing architecture, SIMD, bit-serial and word-parallel, table-lookup coding, DCT, Huffman coding, JPEG,
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4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words Koh JOHGUCHI Hans Jurgen MATTAUSCH Tetsushi KOIDE Tetsuo HIRONAKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/11/01 Vol. E90-C No. 11 pp. 2157-2160 Type of Manuscript: LETTER Category: Integrated Electronics Keyword: multi-port memory, unified cache, SRAM, CMOS,
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Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor Takeshi KUMAKI Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Yasuto KURODA Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/08/01 Vol. E90-D No. 8 pp. 1312-1315 Type of Manuscript: LETTER Category: Image Processing and Video Processing Keyword: DCT, fast DCT, matrix-processing engine, SIMD, bit-serial and word-parallel,
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Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories Md. Anwarul ABEDIN Yuki TANAKA Ali AHMADI Shogo SAKAKIBARA Tetsushi KOIDE Hans Jurgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/06/01 Vol. E90-A No. 6 pp. 1240-1243 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: associative memory, pattern matching, fully-parallel search, k-nearest-matches,
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Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer Takeshi KUMAKI Yasuto KURODA Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/01/01 Vol. E90-D No. 1 pp. 334-345 Type of Manuscript: PAPER Category: Image Processing and Video Processing Keyword: content addressable memory, CAM, Huffman coding, parallel processing, pipeline, code word table,
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Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory Takeshi KUMAKI Yutaka KONO Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/01/01 Vol. E90-D No. 1 pp. 346-354 Type of Manuscript: PAPER Category: Image Processing and Video Processing Keyword: multiport, content addressable memory, CAM, parallel processing, SIMD, categorization, bit parallel block parallel, table-lookup-coding, Huffman coding,
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A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC Hideyuki NODA Katsumi DOSAKA Hans Jurgen MATTAUSCH Tetsushi KOIDE Fukashi MORISHITA Kazutami ARIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-C No. 11 pp. 1612-1619 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: soft error, ECC, TCAM, embedded, DRAM,
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Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video-Segmentation Takashi MORIMOTO Hidekazu ADACHI Osamu KIRIYAMA Tetsushi KOIDE Hans Jurgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/03/01 Vol. E89-D No. 3 pp. 1299-1302 Type of Manuscript: LETTER Category: Image Processing and Video Processing Keyword: image segmentation, real-time image processing, parallel processing, LSI implementation,
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A CAM-Based Signature-Matching Co-processor with Application-Driven Power-Reduction Features Kazunari INOUE Hideyuki NODA Kazutami ARIMOTO Hans Jurgen MATTAUSCH Tetsushi KOIDE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1332-1342 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: CAM, TCAM, signature-matching, network security,
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A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential Dondee NAVARRO Takeshi MIZOGUCHI Masami SUETAKE Kazuya HISAMITSU Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/05/01 Vol. E88-C No. 5 pp. 1079-1086 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: pinch-off region, channel-length modulation, overlap capacitance, surface-potential-based modeling, circuit simulation,
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Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh Hideyuki NODA Kazunari INOUE Hans Jurgen MATTAUSCH Tetsushi KOIDE Katsumi DOSAKA Kazutami ARIMOTO Kazuyasu FUJISHIMA Kenji ANAMI Tsutomu YOSHIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-C No. 4 pp. 622-629 Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Memory Keyword: CMOS, Ternary CAM, network, refresh,
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1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation Shizunori MATSUMOTO Hiroaki UENO Satoshi HOSOKAWA Toshihiko KITAMURA Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Tatsuya OHGURO Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/02/01 Vol. E88-C No. 2 pp. 247-254 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: 100 nm-MOSFET, 1/f noise, measurement, modeling,
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Efficient Video-Picture Segmentation Algorithm for Cell-Network-Based Digital CMOS Implementation Takashi MORIMOTO Yohmei HARADA Tetsushi KOIDE Hans Jurgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/02/01 Vol. E87-D No. 2 pp. 500-503 Type of Manuscript: LETTER Category: Image Processing, Image Pattern Recognition Keyword: image segmentation, pixel-parallel processing, cell-network, LSI implementation, digital CMOS circuit,
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Circuit-Simulation Model of C_gd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients Dondee NAVARRO Hiroaki KAWANO Kazuya HISAMITSU Takatoshi YAMAOKA Masayasu TANAKA Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/03/01 Vol. E86-C No. 3 pp. 474-480 Type of Manuscript: INVITED PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02)) Category: Keyword: gate-drain capacitance, surface-potential based modeling, lateral field gradient, pocket-implant technology,
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Area-Efficient Multi-Port SRAMs for On-Chip Data-Storage with High Random-Access Bandwidth and Large Storage Capacity Hans Jurgen MATTAUSCH Koji KISHI Takayuki GYOHTEN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/03/01 Vol. E84-C No. 3 pp. 410-417 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: multiple-ports, SRAM, cache, access bandwidth,
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