| Hanho LEE
|
|
|
Low-Complexity Multi-Mode Memory-Based FFT Processor for DVB-T2 Applications Kisun JUNG Hanho LEE | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/11/01
Vol. E94-A
No. 11
pp. 2376-2383
Type of Manuscript:
PAPER Category: Digital Signal Processing Keyword: DVB-T2, FFT, multi-mode, scaling, pipelined, shared memory, | | Summary | Full Text:PDF | |
|
|
|
|
|
High-Speed Two-Parallel Concatenated BCH-Based Super-FEC Architecture for Optical Communications Sangho YOON Hanho LEE Kihoon LEE | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/04/01
Vol. E93-A
No. 4
pp. 769-777
Type of Manuscript:
PAPER Category: VLSI Design Technology and CAD Keyword: concatenated BCH code, FEC, architecture, optical, | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
|
|
Power-Aware Scalable Pipelined Booth Multiplier Hanho LEE | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/11/01
Vol. E88-A
No. 11
pp. 3230-3234
Type of Manuscript:
LETTER Category: VLSI Design Technology and CAD Keyword: power-aware, pipelined, Booth multiplier, low-power, design, | | Summary | Full Text:PDF | |
|
|