Hae-Wook CHOI

Instruction Based Synthesizable Testbench Architecture
Ho-Seok CHOI Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/05/01
Vol. E89-C  No. 5  pp. 653-657
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
verification, testbench, emulation, instruction, 
 Summary | Full Text:PDF
Low Latency and Memory Efficient Viterbi Decoder Using Modified State-Mapping Method
Sang-Ho SEO Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2006/04/01
Vol. E89-B  No. 4  pp. 1413-1416
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
Viterbi decoder, register exchange, trace back, latency, resource usage, 
 Summary | Full Text:PDF
Accelerating Verification with Reusable Testbench
Jungbo SON Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/02/01
Vol. E89-D  No. 2  pp. 853-856
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
verification, testbench, reuse, Aptix, Celaro, 
 Summary | Full Text:PDF
A New Efficient Scheduling Algorithm in Bluetooth Piconet
Bong-Soo LEE Hae-Wook CHOI Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2004/11/01
Vol. E87-B  No. 11  pp. 3374-3377
Type of Manuscript:  LETTER
Category: Wireless Communication Technologies
Keyword: 
Bluetooth, scheduling, piconet, 
 Summary | Full Text:PDF
A Fast Algebraic Codebook Search Method for DSVD Applications
Joon-Young JUNG Hae-Wook CHOI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/07/01
Vol. E84-D  No. 7  pp. 915-917
Type of Manuscript:  LETTER
Category: Speech and Hearing
Keyword: 
algebraic codebook, DSVD applications, 
 Summary | Full Text:PDF