Gi-Ho PARK


Low-Power Embedded Processor Design Using Branch Direction
Gi-Ho PARK Jung-Wook PARK Gunok JUNG Shin-Dug KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 3180-3181
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
low powerBTBwordline gating
 Summary | Full Text:PDF

A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache
Gi-Ho PARK Jung-Wook PARK Hoi-Jin LEE Gunok JUNG Sung-Bae PARK Shin-Dug KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 517-521
Type of Manuscript:  Special Section LETTER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
way-enabling mechanismbranch informationembedded processor and low power instruction cache design
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Cooperative Cache System: A Low Power Cache System for Embedded Processors
Gi-Ho PARK Kil-Whan LEE Tack-Don HAN Shin-Dug KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 708-717
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
low power cachecooperative cacheblock sizeassociativityembedded processor
 Summary | Full Text:PDF