Erl-Huei LU

Concurrent Algorithm and Hardware Implementation for Low-Latency Turbo Decoder Using a Single MAP Decoder
Ya-Cheng LU Erl-Huei LU 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2010/01/01
Vol. E93-B  No. 1  pp. 1-8
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
concurrent decodingturbo codesmaximum a posteriori (MAP)iterative decoding delaylow latency
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Scalable and Systolic Montgomery Multipliers over GF(2m)
Chin-Chin CHEN Chiou-Yng LEE Erl-Huei LU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/07/01
Vol. E91-A  No. 7  pp. 1763-1771
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
systolic multiplierToeplitz matrix-vectorscalable architectureMontgomery
 Summary | Full Text:PDF(1.1MB)