IEICE SEARCH SYSTEM

Eisuke ARAI

Low-Power Switched Current Memory Cell with CMOS-Type Configuration Masashi KATO Nobuyuki TERADA Hirofumi OHATA Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/01/01 Vol. E91-C No. 1 pp. 120-121 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: switched current, low-power, CMOS-type, memory cell,
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An On-Line Scheduler for ASIC Manufacturing Line Management Tadao TAKEDA Satoshi TAZAWA Kou WADA Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 241-247 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: scheduler, ASIC, TAT, algorithm,
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A Scalable and Flexible CIM System with Precise and Quick Scheduler for ASIC Kou WADA Tsuneo OKUBO Satoshi TAZAWA Tetsuma SAKURAI Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 229-235 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: integrated electronics, instrumentation and control, CIM, ASIC, FA,
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A Flexible and Low-Cost ASIC Line Management Technology Taking Operator's Skill-Level as a Scheduling-Factor into Consideration Tetsuma SAKURAI Satoshi TAZAWA Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 236-240 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: ASIC, manufacturing, fabrication, line management, TAT, operator, shift, low cost,
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Configuration of a Manufacturing Line for Mixed Production of Ultra-Short TAT LSIs and Low-Cost LSIs Eisuke ARAI Shinji NAKAMURA Tetsuma SAKURAI Ayano KOJIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 214-221 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: integrated electronics, LSI manufacturing line, single-wafer processing, batch processing, ultra-short TAT, low wafer cost,
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LSI Delivery Management System Using Lot Sampling Scheduling Method for ASIC Production Line Masahiro YOSHIZAWA Tetsuma SAKURAI Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 222-228 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: delivery management, scheduling, virtual line, marker lot, turn-around-time,
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FOREWORD Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1994/03/25 Vol. E77-C No. 3 pp. 341-341 Type of Manuscript: FOREWORD Category: Keyword:
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FOREWORD Eisuke ARAI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/04/25 Vol. E76-C No. 4 pp. 505-505 Type of Manuscript: FOREWORD Category: Keyword:
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FOREWORD Shin'ichi OISHI Eisuke ARAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/11/25 Vol. E73-E No. 11 pp. 1781-1781 Type of Manuscript: FOREWORD Category: Keyword:
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FOREWORD Eisuke ARAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/04/25 Vol. E73-E No. 4 pp. 453-453 Type of Manuscript: FOREWORD Category: Keyword:
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FOREWORD Eisuke ARAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/10/25 Vol. E72-E No. 10 pp. 1031-1031 Type of Manuscript: FOREWORD Category: Keyword:
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