Dondee NAVARRO

Prediction of DC-AC Converter Efficiency Degradation due to Device Aging Using a Compact MOSFET-Aging Model
Kenshiro SATO Dondee NAVARRO Shinya SEKIZAKI Yoshifumi ZOKA Naoto YORINO Hans Jürgen MATTAUSCH Mitiko MIURA-MATTAUSCH 
Publication:   
Publication Date: 2020/03/01
Vol. E103-C  No. 3  pp. 119-126
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
compact model, DC-AC converter, device aging, efficiency, SiC-MOSFET, 
 Summary | Full Text:PDF
Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs
Arnab MUKHOPADHYAY Tapas Kumar MAITI Sandip BHATTACHARYA Takahiro IIZUKA Hideyuki KIKUCHIHARA Mitiko MIURA-MATTAUSCH Hafizur RAHAMAN Sadayuki YOSHITOMI Dondee NAVARRO Hans Jürgen MATTAUSCH 
Publication:   
Publication Date: 2019/06/01
Vol. E102-C  No. 6  pp. 487-494
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
MOSFET, optimization, power efficient circuit design, CMOS, short-channel effect, transit delays, 
 Summary | Full Text:PDF
Shot Noise Modeling in Metal-Oxide-Semiconductor Field Effect Transistors under Sub-Threshold Condition
Yoshioki ISOBE Kiyohito HARA Dondee NAVARRO Youichi TAKEDA Tatsuya EZAKI Mitiko MIURA-MATTAUSCH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 885-894
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
MOSFET, shot noise, high frequency noise, device simulation, sub-threshold current, 
 Summary | Full Text:PDF
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential
Dondee NAVARRO Takeshi MIZOGUCHI Masami SUETAKE Kazuya HISAMITSU Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5  pp. 1079-1086
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
pinch-off region, channel-length modulation, overlap capacitance, surface-potential-based modeling, circuit simulation, 
 Summary | Full Text:PDF
Circuit-Simulation Model of Cgd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients
Dondee NAVARRO Hiroaki KAWANO Kazuya HISAMITSU Takatoshi YAMAOKA Masayasu TANAKA Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 474-480
Type of Manuscript:  INVITED PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
Category: 
Keyword: 
gate-drain capacitance, surface-potential based modeling, lateral field gradient, pocket-implant technology, 
 Summary | Full Text:PDF