Chiu-sing CHOY

Parallel Test Structure in Latch Based Asynchronous Pipeline
Jing-ling YANG Chiu-sing CHOY Cheong-Fat CHAN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11  pp. 2527-2529
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
asynchronouspipelineevent logiclatchtest
 Summary | Full Text:PDF(468.5KB)

An Asynchronous Cell Library for Self-Timed System Designs
Yuk-Wah PANG Wing-yun SIT Chiu-sing CHOY Cheong-fat CHAN Wai-kuen CHAM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/03/25
Vol. E80-D  No. 3  pp. 296-307
Type of Manuscript:  Special Section PAPER (Special Issue on Asynchronous Circuit and System Design)
Category: Design
self-timed logicasynchronous designstandard cellVLSI
 Summary | Full Text:PDF(1008KB)