Chingwei YEH


Design of High-Performance CMOS Level Converters Considering PVT Variations
Jinn-Shyan WANG Yu-Juey CHANG Chingwei YEH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5  pp. 913-916
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
level convertervoltage scalingdual-VDDPVT variations
 Summary | Full Text:PDF

Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays
Jinn-Shyan WANG Yu-Juey CHANG Chingwei YEH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/10/01
Vol. E93-C  No. 10  pp. 1540-1543
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
level convertervoltage scalinghigh performance
 Summary | Full Text:PDF