Cheng-Wu LIN

A Low-Cost Stimulus Design for Linearity Test in SAR ADCs
An-Sheng CHAO Cheng-Wu LIN Hsin-Wen TING Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/06/01
Vol. E97-C  No. 6  pp. 538-545
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
analog-to-digital converter (ADC)design for testability (DFT)pattern generator (PG)output response analyzer (ORA)
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