C. Bernard SHUNG


Delay-Optimal Technology Mapping for Hard-Wired Non-Homogeneous FPGAs
Hsien-Ho CHUANG Jing-Yang JOU C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12  pp. 2545-2551
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Performance Optimization
Keyword: 
technology mappingFPGAhard-wirednon-homogeneousXC4000
 Summary | Full Text:PDF

An Efficient Architecture for Multicasting in Shared Buffer ATM Switches
Yu-Sheng LIN C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Vol. E81-B  No. 2  pp. 276-283
Type of Manuscript:  Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: Multicasting in ATM switch
Keyword: 
multicastingshared buffer ATM switches
 Summary | Full Text:PDF

A Queue Manager Chip for Shared Buffer ATM Switches
Yu-Sheng LIN Hsing-Chien HUANG C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/11/25
Vol. E79-B  No. 11  pp. 1623-1632
Type of Manuscript:  PAPER
Category: Communication Networks and Services
Keyword: 
shared buffer ATM Switchqueue management
 Summary | Full Text:PDF

Technology Mapping for FPGAs with Composite Logic Block Architectures
Hsien-Ho CHUANG C. Bernard SHUNG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/10/25
Vol. E79-D  No. 10  pp. 1396-1404
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Synthesis
Keyword: 
technology mappingFPGAsubject graphpattern graph
 Summary | Full Text:PDF