Bin-Da LIU

A Multi-Channel Electrochemical Measurement System for Biomolecular Detection
Wei-Chiun LIU Bin-Da LIU Chia-Ling WEI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/11/01
Vol. E99-C  No. 11  pp. 1295-1303
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
3-hydroxyanthranilic acid, electrochemical, melatonin, molecularly imprinted polymers, nuclear matrix protein 22, 
 Summary | Full Text:PDF
New Power Factor Correction Application for a Small Wind Power System
Jun-Hua CHIANG Bin-Da LIU Shih-Ming CHEN Hong-Tzer YANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/05/01
Vol. E99-C  No. 5  pp. 581-589
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
power factor correction, digital control, nonlinear-carrier control, 
 Summary | Full Text:PDF
A Single Opamp Third-Order Low-Distortion Delta-Sigma Modulator with SAR Quantizer Embedded Passive Adder
I-Jen CHAO Ching-Wen HOU Bin-Da LIU Soon-Jyh CHANG Chun-Yueh HUANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/06/01
Vol. E97-C  No. 6  pp. 526-537
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
delta-sigma modulator, DSM, opamp sharing, relaxed dynamic element matching (DEM) timing, 
 Summary | Full Text:PDF
A Third-Order Low-Distortion Delta-Sigma Modulator with Opamp Sharing and Relaxed Feedback Path Timing
I-Jen CHAO Chung-Lun HSU Bin-Da LIU Soon-Jyu CHANG Chun-Yueh HUANG Hsin-Wen TING 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/11/01
Vol. E95-C  No. 11  pp. 1799-1809
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
delta-sigma modulator, DSM, opamp sharing, relaxed dynamic element matching (DEM) timing, 
 Summary | Full Text:PDF
A 0.8-V 250-MSample/s Double-Sampled Inverse-Flip-Around Sample-and-Hold Circuit Based on Switched-Opamp Architecture
Hsin-Hung OU Bin-Da LIU Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9  pp. 1480-1487
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
switched-opamp, low-voltage, high-speed, sample-and-hold, double-sampling, 
 Summary | Full Text:PDF
A Versatile Step-Up/Step-Down Switched-Capacitor-Based DC-DC Converter
Chia-Ling WEI Lu-Yao WU Hsiu-Hui YANG Chien-Hung TSAI Bin-Da LIU Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/05/01
Vol. E91-C  No. 5  pp. 809-812
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
DC-DC converter, switched-capacitor, step up, step down, efficiency, 
 Summary | Full Text:PDF
Low-Power Circuit Techniques for Low-Voltage Pipelined ADCs Based on Switched-Opamp Architecture
Hsin-Hung OU Soon-Jyh CHANG Bin-Da LIU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/02/01
Vol. E91-A  No. 2  pp. 461-468
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
low-voltage, switched-opamp, sample-and-hold, opamp-sharing, pipelined ADC, 
 Summary | Full Text:PDF
A High-Speed and Multi-Chip WTA/MAX Circuit Design Based on Averaged-Value Comparison Approach
Kuo-Huang LIN Chi-Sheng LIN Bin-Da LIU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/10/01
Vol. E87-C  No. 10  pp. 1724-1729
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
winner-take-all (WTA), maximum (MAX), averaged-value comparison, multi-chip, voltage comparison element (VCE), 
 Summary | Full Text:PDF
Coefficients Generation for the 4th-Order Leapfrog Sigma-Delta A/D Converters
Wen-Bin LIN Bin-Da LIU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/01/01
Vol. E87-A  No. 1  pp. 231-242
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
sigma-delta, A/D converters, noise transfer function, signal to noise ratio, dynamic range, stable region, absolutely stable region, numerical algorithm, noise power gain, sensitivity, non-ideal effect, 
 Summary | Full Text:PDF
An Analog CMOS Rank-Order Extractor with O(N) Complexity Using Maximum/Winner-Take-All Circuit
Yu-Cherng HUNG Bin-Da LIU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/08/01
Vol. E86-C  No. 8  pp. 1765-1773
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
maximum, minimum, winner-take-all, rank-order extractor, 
 Summary | Full Text:PDF