Bin LIU

Parallel DFA Architecture for Ultra High Throughput DFA-Based Pattern Matching
Yi TANG Junchen JIANG Xiaofei WANG Chengchen HU Bin LIU Zhijia CHEN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/12/01
Vol. E93-D  No. 12  pp. 3232-3242
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
Deterministic Finite Automata (DFA), Deep Packet Inspection (DPI), regular expression, parallel matching, speedup, 
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Voltage Island Generation in Cell Based Dual-Vdd Design
Yici CAI Bin LIU Qiang ZHOU Xianlong HONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/01/01
Vol. E90-A  No. 1  pp. 267-273
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
dual-Vdd, layout, placement, voltage island, voltage assignment, 
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Crosstalk and Congestion Driven Layer Assignment Algorithm
Bin LIU Yici CAI Qiang ZHOU Xianlong HONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A  No. 6  pp. 1565-1572
Type of Manuscript:  PAPER
Category: Circuit Theory
Keyword: 
congestion, crosstalk, layer assignment, VLSI, 
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Modeling of Off-Track BER Performance of AMR and GMR Heads
Weichun YE Bin LIU Yu LIN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/09/25
Vol. E83-C  No. 9  pp. 1500-1504
Type of Manuscript:  Special Section PAPER (Special Issue on Selected Papers from the 4th Asian Symposium for Information Storage Technology)
Category: 
Keyword: 
magnetic recording, magnetic modeling, magnetic measurement, off-track, 
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