Benjamin DEVLIN

Self Synchronous Circuits for Robust Operation in Low Voltage and Soft Error Prone Environments
Benjamin DEVLIN Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 518-527
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
self synchronous, gate-level, robustness, single event upset, low voltage, reliability, 
 Summary | Full Text:PDF
Energy Minimum Operation with Self Synchronous Gate-Level Autonomous Power Gating and Voltage Scaling
Benjamin DEVLIN Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 546-554
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
power gating, gate-level, pipeline, self synchronous, energy minimum operation, FPGA, 
 Summary | Full Text:PDF