Bangan LIU

A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock
Haosheng ZHANG Aravind THARAYIL NARAYANAN Hans HERDIAN Bangan LIU Rui WU Atsushi SHIRANE Kenichi OKADA 
Publication:   
Publication Date: 2019/04/01
Vol. E102-C  No. 4  pp. 276-286
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
VCO, chip-scale atomic clock (CSAC), power efficiency, phase noise, tank loading, tail filter, 
 Summary | Full Text:PDF(4.4MB)
A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS
Bangan LIU Yun WANG Jian PANG Haosheng ZHANG Dongsheng YANG Aravind Tharayil NARAYANAN Dae Young LEE Sung Tae CHOI Rui WU Kenichi OKADA Akira MATSUZAWA 
Publication:   
Publication Date: 2018/02/01
Vol. E101-C  No. 2  pp. 126-134
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
60-GHz, 5G communication, spectrum mask compliant, duobinary, semi-digital FIR, 
 Summary | Full Text:PDF(2MB)