Atusi MAEDA


FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet
Toshihiro KATASHITA Yoshinori YAMAGUCHI Atusi MAEDA Kenji TODA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/12/01
Vol. E90-D  No. 12  pp. 1923-1931
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Reconfigurable System and Applications
Keyword: 
intrusion detection systemintrusion protection systemexact string matchingFPGA10 Gigabit Ethernet
 Summary | Full Text:PDF(843.9KB)

Proposition and Evaluation of Parallelism-Independent Scheduling Algorithms for DAGs of Tasks with Non-Uniform Execution Times
Kirilka NIKOLOVA Atusi MAEDA Masahiro SOWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/06/01
Vol. E84-A  No. 6  pp. 1496-1505
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000))
Category: 
Keyword: 
multiprocessor schedulingstatic/dynamic schedulingparallelism-independent schedulingdegree of parallelism (DOP)direct acyclic graphs (DAGs)
 Summary | Full Text:PDF(1.3MB)

Parallelism-Independent Scheduling Method
Kirilka NIKOLOVA Atusi MAEDA Masahiro SOWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Vol. E83-A  No. 6  pp. 1138-1150
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99))
Category: 
Keyword: 
instruction schedulingstatic scheduling algorithmsmultiprocessor schedulingdegree of parallelism (DOP)directed acyclic graphs (DAGs)
 Summary | Full Text:PDF(1.3MB)