Atsushi KINOSHITA


A 5.8 ns 256 kb SRAM with 0.4 µm Super-CMOS Process Technology
Kunihiko KOZARU Atsushi KINOSHITA Tomohisa WADA Yutaka ARITA Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C  No. 4  pp. 566-572
Type of Manuscript:  Special Section PAPER (Special Issue on Circuit Technologies for Memory and Analog LSIs)
Category: 
Keyword: 
super-CMOShigh-speed SRAMreference voltage generatorvoltage down converter
 Summary | Full Text:PDF(583.1KB)

A Study of Delay Time on Bit Lines in Megabit SRAM's
Atsushi KINOSHITA Shuji MURAKAMI Yasumasa NISHIMURA Kenji ANAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/11/25
Vol. E75-C  No. 11  pp. 1383-1386
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
SRAMcoupling capacitancebit-line
 Summary | Full Text:PDF(391.2KB)