Akitaka HIRATSUKA


Design of a 45 Gb/s, 98 fJ/bit, 0.02 mm2 Transimpedance Amplifier with Peaking-Dedicated Inductor in 65-nm CMOS
Akira TSUCHIYA Akitaka HIRATSUKA Kenji TANAKA Hiroyuki FUKUYAMA Naoki MIURA Hideyuki NOSAKA Hidetoshi ONODERA 
Publication:   
Publication Date: 2020/10/01
Vol. E103-C  No. 10  pp. 489-496
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Integrated Electronics
Keyword: 
optical communicationtransimpedance amplifierinductive peakingon-chip inductor
 Summary | Full Text:PDF

Impact of On-Chip Inductor and Power-Delivery-Network Stacking on Signal and Power Integrity
Akira TSUCHIYA Akitaka HIRATSUKA Toshiyuki INOUE Keiji KISHINE Hidetoshi ONODERA 
Publication:   
Publication Date: 2019/07/01
Vol. E102-C  No. 7  pp. 573-579
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
power integritysignal integritymulti-layered inductor
 Summary | Full Text:PDF