Akira ONOZAWA

A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolar, ECL, standard cell, CAD, SDH, 
 Summary | Full Text:PDF
A Balanced-Mesh Clock Routing Technique for Performance Improvement
Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8  pp. 1489-1495
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSI, CAD, layout design, clock skew, partitioning, routing, MPEG2, 
 Summary | Full Text:PDF
Power and Timing Optimization for ECL LSIs in Post-Layout Design
Akira ONOZAWA Hitoshi KITAZAWA Kenji KAWAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/06/25
Vol. E79-A  No. 6  pp. 892-899
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSI CAD, ECL, power, delay, non-linear optimization, 
 Summary | Full Text:PDF